diff --git a/general.asm b/general.asm
new file mode 100644
index 0000000..e69de29
diff --git a/init.asm b/init.asm
new file mode 100644
index 0000000..e3bfa74
--- /dev/null
+++ b/init.asm
@@ -0,0 +1,4 @@
+SystemInit: 
+	rcall SchedulerInit
+	
+	reti
\ No newline at end of file
diff --git a/isr_vect_table.asm b/isr_vect_table.asm
new file mode 100644
index 0000000..0b8e308
--- /dev/null
+++ b/isr_vect_table.asm
@@ -0,0 +1,24 @@
+jmp SystemInit 			;System Reset Handler
+jmp Default_ISR			;IRQ0 Handler
+jmp Default_ISR			;IRQ1 Handler
+jmp Default_ISR			;Timer2 Compare Handler
+jmp Default_ISR			;Timer2 Overflow Handler
+jmp Default_ISR			;Timer1 Capture Handler
+jmp Default_ISR			;Timer1 CompareA Handler
+jmp Default_ISR			;Timer1 CompareB Handler
+jmp Default_ISR			;Timer1 Overflow Handler
+jmp Default_ISR			;Timer0 Overflow Handler
+jmp Default_ISR			;SPI Transfer Complete Handler
+jmp Default_ISR			;USART RX Complete Handler
+jmp Default_ISR			;UDR Empty Handler
+jmp Default_ISR			;USART TX Complete Handler
+jmp Default_ISR			;ADC Conversion Complete Handler
+jmp Default_ISR			;EEPROM Ready Handler
+jmp Default_ISR			;Analog Comparator Handler
+jmp Default_ISR			;Two-wire Serial Interface Handler
+jmp Default_ISR			;IRQ2 Handler
+jmp Default_ISR			;Timer0 Compare Handler
+jmp Default_ISR			;Store Program Memory Ready Handler
+
+Default_ISR:
+	reti;
\ No newline at end of file
diff --git a/main.asm b/main.asm
new file mode 100644
index 0000000..58bfa8b
--- /dev/null
+++ b/main.asm
@@ -0,0 +1,6 @@
+.include	"m16def.inc"
+.include	"isr_vect_table.asm"
+
+.include	"init.asm"
+.include	"scheduler.asm"
+.include	"general.asm"
\ No newline at end of file