From 0bfac8e158a8955ba4f41735b053f4156cf1e2bb Mon Sep 17 00:00:00 2001 From: overflowerror Date: Fri, 18 Apr 2014 00:18:07 +0200 Subject: [PATCH] new isr-vect-table because of 1284 instead of 16 --- isr_vect_table.asm | 56 +++++++++++++++++++++++++++++----------------- 1 file changed, 35 insertions(+), 21 deletions(-) diff --git a/isr_vect_table.asm b/isr_vect_table.asm index 0b8e308..bd2604c 100644 --- a/isr_vect_table.asm +++ b/isr_vect_table.asm @@ -1,24 +1,38 @@ -jmp SystemInit ;System Reset Handler -jmp Default_ISR ;IRQ0 Handler -jmp Default_ISR ;IRQ1 Handler -jmp Default_ISR ;Timer2 Compare Handler -jmp Default_ISR ;Timer2 Overflow Handler -jmp Default_ISR ;Timer1 Capture Handler -jmp Default_ISR ;Timer1 CompareA Handler -jmp Default_ISR ;Timer1 CompareB Handler -jmp Default_ISR ;Timer1 Overflow Handler -jmp Default_ISR ;Timer0 Overflow Handler -jmp Default_ISR ;SPI Transfer Complete Handler -jmp Default_ISR ;USART RX Complete Handler -jmp Default_ISR ;UDR Empty Handler -jmp Default_ISR ;USART TX Complete Handler -jmp Default_ISR ;ADC Conversion Complete Handler -jmp Default_ISR ;EEPROM Ready Handler -jmp Default_ISR ;Analog Comparator Handler -jmp Default_ISR ;Two-wire Serial Interface Handler -jmp Default_ISR ;IRQ2 Handler -jmp Default_ISR ;Timer0 Compare Handler -jmp Default_ISR ;Store Program Memory Ready Handler +jmp SystemInit ; System Reset Handler +jmp Default_ISR ; IRQ0 Handler +jmp Default_ISR ; IRQ1 Handler +jmp Default_ISR ; PCINT0 Handler +jmp Default_ISR ; PCINT1 Handler +jmp Default_ISR ; PCINT2 Handler +jmp Default_ISR ; PCINT3 Handler +jmp SystemInit ; Watchdog Timeout +jmp Default_ISR ; Timer2 CompareA Handler +jmp Default_ISR ; Timer2 CompareB Handler +jmp Default_ISR ; Timer2 Overflow Handler +jmp Default_ISR ; Timer1 Capture Handler +jmp Default_ISR ; Timer1 CompareA Handler +jmp Default_ISR ; Timer1 CompareB Handler +jmp Default_ISR ; Timer1 Overflow Handler +jmp Default_ISR ; Timer0 CompareA Handler +jmp Default_ISR ; Timer0 CompareB Handler +jmp Default_ISR ; Timer0 Overflow Handler +jmp Default_ISR ; SPI Transfer Complete Handler +jmp Default_ISR ; USART0 RX Complete Handler +jmp Default_ISR ; USART0 UDR Empty Handler +jmp Default_ISR ; USART0 TX Complete Handler +jmp Default_ISR ; Analog Comparator +jmp Default_ISR ; ADC Conversion Complete Handler +jmp Default_ISR ; EEPROM Ready Handler +jmp Default_ISR ; Two-wire Serial Interface Handler +jmp Default_ISR ; SPM Ready +jmp Default_ISR ; USART1 RX Complete Handler +jmp Default_ISR ; USART1 UDR Empty Handler +jmp Default_ISR ; USART1 TX Complete Handler +jmp Default_ISR ; Timer3 Capture Handler +jmp Default_ISR ; Timer3 CompareA Handler +jmp Default_ISR ; Timer3 CompareB Handler +jmp Default_ISR ; Timer3 Overflow Handler +jmp Default_ISR ; Store Program Memory Ready Handler Default_ISR: reti; \ No newline at end of file